1. Field of the Invention
This invention relates to signal processing arrangements and, in particular, to digital filtering
2. Description of the Prior Art
The prior art provides digital filtering arrangements with whole-number digital data processors which require complex computational hardware to implement whole-number computations. Prior art correlators are implemented as frequency-domain correlators by first performing a Fast Fourier Transform (FFT) to convert time-domain input information to frequency-domain information, then by performing a correlation operation in the frequency-domain, and then by performing an inverse FFT for converting the frequency-domain correlated information to time-domain information for interpretation by an operator. The large quantity of whole-number computational operations such as multiplication operations for an FFT computation, complex hardware, and extensive computations result in expensive correlation processors which are not able to operate in real-time. Further, prior art equipment such as digital correlators are implemented based upon requiring input resolution comperable to the desired output resolution. Therefore, prior art systems such as the CAFDRS system provided by United Geophysical of Pasadena, Calif. use a compositor to composite information prior to correlation in order to reduce the data rate of correlation input information. Further, such prior art systems cannot perform real-time correlation computations but can only perform correlation computations off-line; where on-line real-time correlation is not feasible in the prior art because of correlator speed limitations. The prior art operation of compositing-before-correlation, which is used to reduce data rates, introduces many limitations such as requiring repeatable signal sources and requiring repetition of ensonifying signals for compositing-before-correlation. Further, the non-real-time off-line operation of prior art correlators, resulting from the relatively low performance of prior art whole-number correlators, precludes correlation of information as acquired in real-time and precludes the ability for correlating all of the information acquired without first compositing.
The prior art has considered that a correlator must have a computation word size that is related to a required output word size. For example, a 16-bit correlator generates 16-bit correlation output words by performing computations with 16-bit computational circuits on 16-bit input trace and pilot words. Consequently, prior art correlators typically having a 16-bit word size have been implemented with complex computations for manipulating 16-bit words.